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AI – Amplified Risk – Aware Mutual Runtime Trust Verification Framework for Secure V2G Authentication Systems

초록/요약

Vehicle-to-Grid （V2G） systems enable bidirectional energy exchange between Electric Vehicles （EVs） and the smart grid and have become critical infrastructure for sustainable transportation. The Plug-and-Charge （PnC） authentication scheme defined in International Organization for Standardization （ISO） 15118 automates this interaction, but it establishes trust only once, at boot time or during the Transport Layer Security （TLS） handshake. A charging session, however, can last for hours, during which either endpoint may be compromised at runtime without any protocol-level means of detection. This unverified runtime window is the central vulnerability this thesis addresses. We argue that closing this gap requires two capabilities that have not previously been combined: a risk model that reflects how modern, AI-assisted adversaries actually behave, and a verification mechanism that operates continuously and in both directions throughout the session. To the first end, we propose the AI Amplification Factor （AAF）, which augments the classical DREAD risk score with the MITRE ATLAS adversarial-machine-learning taxonomy and FIRST EPSS exploitation probabilities; evaluated across high-severity Common Vulnerabilities and Exposures （CVEs） from 2021 to 2025, the AAF reveals risk-prioritization shifts that static scoring cannot capture. To the second end, we propose the Mutual Runtime Attestation （MRA） framework, a TPM 2.0-anchored protocol in which the EV and the Electric Vehicle Charging Station （EVCS） continuously attest to each other's integrity. The proposed framework embeds its attestation evidence within mandatory ISO 15118-20 messages, introduces no additional communication channels, and degrades gracefully to a restricted Guest Mode when verification fails. We validate the framework through a Python-based discrete-event simulation of 10,000 attestation events, implemented in a Jupyter Notebook environment and modeled on the ISO 15118-20 Plug-and-Charge session lifecycle with TPM 2.0 signing latencies calibrated to the Infineon OPTIGA SLB 9670 datasheet, achieving 96.84% attack-detection accuracy at a mean verification latency of approximately 35ms, only 1.75% of the ISO 15118-20 timing budget. The proposed framework deterministically detects all three considered attack scenarios: EV runtime compromise, EVCS runtime compromise, and bidirectional V2G grid-data injection. Together, these results establish a principled foundation for a zero-trust security model in next-generation V2G charging infrastructure.

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목차

Chapter 1. Introduction 1
1.1 Background and Motivation 1
1.2 Problem Statement and Research Gap 2
1.3 Research Contributions 5
1.3.1 AI Amplification Factor (AAF) 5
1.3.2 Mutual Runtime Attestation (MRA) Protocol 5
1.3.3 Formal Security Analysis 5
1.3.4 Fail-Secure Remediation Architecture 6
1.3.5 Empirical Validation 6
1.4 Thesis Organization 6
Chapter 2. Background and Related Work 8
2.1 V2G Ecosystem and ISO 15118 Plug-and-Charge 8
2.2 Trusted Computing and TPM 2.0 9
2.2.1 Platform Configuration Registers (PCRs) 9
2.2.2 Attestation Key (AK) 10
2.2.3 Event Log 10
2.2.4 Measured Boot 11
2.3 Remote Attestation 11
2.4 Related Work and Research Gap 12
Chapter 3. V2G Authentication Threat Analysis 15
3.1 V2G Authentication Process 15
3.2 Threat Vectors 16
3.2.1 Man-in-the-Middle Attack 17
3.2.2 Relay Attack 17
3.2.3 Replay Attack 18
3.2.4 Impersonation and Certificate Forgery 18
3.2.5 Denial-of-Service Attack 19
3.2.6 Session Hijacking 20
3.2.7 Billing Fraud 20
3.3 STRIDE-Based Threat Classification 21
Chapter 4. AI-Amplified Risk Quantification 24
4.1 DREAD Baseline 24
4.2 AI Amplification Factor (AAF) 25
4.2.1 Empirical Inputs 26
4.2.2 Algebraic Form and Weight Calibration 27
4.2.3 Composite AI-Amplified Risk Score 28
4.3 Composite Risk and Sensitivity Analysis 29
Chapter 5. Proposed MRA Framework 33
5.1 System Model and Adversary Model 34
5.1.1 System Model 34
5.1.2 Adversary Model 35
5.2 Security Requirements 37
5.2.1 Baseline Requirements 38
5.2.2 Endpoint-Integrity Requirements 39
5.2.3 Availability and Degradation Requirements 40
5.3 PCR Allocation Policy 41
5.3.1 Design Rationale 42
5.3.2 Runtime Measurement Mechanism 43
5.3.3 Realization of the Security Requirements 46
5.4 The Three-Phase MRA Protocol 46
5.4.1 Phase 1: Mutual Boot Integrity Verification 47
5.4.2 Phase 2: Continuous Runtime Attestation 52
5.4.3 Phase 3: Failure Remediation and Graceful Degradation 56
Chapter 6. Validation and Security Analysis 60
6.1 Simulation Environment 60
6.2 Threat Detection Results 62
6.3 Performance and ISO 15118 Compliance 63
6.4 Security Analysis 67
6.4.1 Defense Against Runtime Malware (T1 / SR4) 67
6.4.2 Defense Against Boot-Level Rootkits (SR3) 68
6.4.3 Defense Against Replay, Nonce Reuse, and Forgery (SR5) 68
6.4.4 Defense Against DoS and Downgrade Attacks 69
6.5 Limitations of Validation and Roadmap to Hardware Validation 69
Chapter 7. Conclusion and Future Work 71
7.1 Conclusion 71
7.2 Future Work 72
References 73
Appendix A. 76
A.1 Participating Entities and Sessions 76
A.2 Trusted Platform Module and Keys 76
A.3 Cryptographic Primitives 77
A.4 Attestation Protocol Symbols 77
A.5 Risk-Quantification Symbols (AAF and DREAD) 78

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