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초광대역 RF 수신단을 위한 간섭 신호 제거 LNA 설계

Design of an Interferer rejection LNA for Ultra-wideband RF Receiver

초록/요약

A CMOS wideband low-noise amplifier (LNA) with bandpass feedback stage for achieving out-band interferer rejection is presented. The proposed interferer rejection topology eliminate the out-band interferers without deteriorating the input matching and noise figure. Moreover, this structure has advantage for high linearity. The proposed LNA is fabricated in a 0.18 μm CMOS process. The LNA with the bandpass feedback stage achieves an out-band interferer rejection of 29.2 dB, and an input third intercept point (IIP3) of 0.2 dBm. The current consumption of the LNA is 7.63 mA from a 1.2 V power supply. In proposed dual-band interferer cancellation LNA, a CMOS wideband low-noise amplifier LNA with bandpass feedback stage for achieving dual-band interferer rejection is presented. The proposed interferer rejection topology eliminates the dual-band interferers without deteriorating the input matching and noise figure. Moreover, this structure has advantage for high linearity. The proposed LNA is fabricated in a 0.11 μm CMOS process. The LNA with bandpass feedback stage achieves 2.4 GHz and 5 GHz maximum rejections of 25.3 and 32.1 dB, and an input third intercept point (IIP3) of 2.47 dBm. The power consumption of the LNA is 12.77 mW from a 1.2 V power supply.

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목차

Abstract
Table of Contents
List of Figures
List of Tables
Chapter 1. Introduction
Chapter 2. Conventional interferer rejection LNA
Chapter 3. Proposed interferer rejection LNA
Chapter 4. Out-band interferer rejection LNA
4.1 Circuit design of the out-band IR-LNA
4.2 Measurement of the out-band IR-LNA
Chapter 5. Dual-band interferer rejection LNA
5.1 Circuit design of the dual-band IR-LNA
5.2 Post-layout simulation result of the dual-band IR-LNA
Chapter 6. Conclusion
Publications
References
국문 요약

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