PLC-Code Auto-Generation and Time Barrier in Simulation Based Verification for Error Checking
PLC-Code Auto-Generation and Time Barrier in Simulation Based Verification for Error Checking
- 주제(키워드) PLC-Code , PLC-Code , Simulation
- 주제(KDC) 530
- 주제(DDC) 658
- 발행기관 아주대학교
- 지도교수 왕지남
- 발행년도 2007
- 학위수여년월 2007. 8
- 학위명 석사
- 학과 및 전공 일반대학원 산업공학과
- 본문언어 영어
초록/요약
A new approach for PLC-Code auto-generation and its offline verification based on virtual simulation environment would be introduced through the thesis. The method, which involves Timed-Automata in the modeling phase, would be introduced for automatically generated PLC-Code on the working cell level. Thereafter, it would come with the explanation of interlock error checking and handling methods for both automatic and manual modes. The basic idea in this part is to compare the estimated operation time with the real one for each mutual zone, so as to detect the overtimes for calculating the global optimized operation sequence. For verifying the proposed approach, the programs and the result of an experimental simulation were given at the end of the thesis. One thing to notice is that the estimated operation time for each mutual zone is the total time span for the zone being used, but does not include detailed time for single operations. However, each single operation time must be estimated correctly so that the zone’s total time span could be calculated correctly, reasonably and feasibly. Additionally, since the generation process in the thesis adopted the assembly technique [1], there are also possibilities for other sub-processes in the cell to reuse the existing information.
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Contents
1. Introduction
2. PLC-Code Auto-Generation
2.1 Preliminaries
2.1.1 Information from 3D Simulation Environment
2.1.2 Mutual Exclusion Zone
2.1.3 Information Reuse
2.1.4 Typical PLC Program
2.1.4.1 Structure
2.1.5 Timed Automata
2.1.5.1 Clocks
2.1.5.2 Clock Constraints
2.1.5.3 Timed-Automata
2.2 Working Logic and Procedure
2.2.1 Algorithm in Zone Calculation
3. Error Handling System
3.1 Error Detection and Handling Areas
3.1.1 Error Detection
3.1.2 Manual Control and Re-Synchronization
3.2 Time Barriers in Simulation Based Verification
3.2.1 Error Detection under Automatic Mode
3.2.2 Manual Mode
3.2.3 Contingency Solution in Real Environment
4. Experiment with IGRIP
4.1 Working Logic
4.2 Implementation
4.2.1 Procedure
4.2.2 Program
4.2.2.1 Robot 2
4.2.2.2 Robot 1
4.2.2.3 Controller
4.2.3 Result
4.2.4 Future Work
5. Conclusion
6. Reference
