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Reliability Improvement of Multilevel Hybrid Active Neutral-Point-Clamped Inverters

초록/요약

This dissertation focuses on improving the reliability of multilevel hybrid active neutral- point-clamped (ANPC) inverters through a series of proposed works. The primary objective is to address key challenges and enhance the overall performance and reliability of multilevel hybrid ANPC inverters. Among multilevel hybrid ANPC inverters, three- and five-level are considered due to their wide utilization in both academia and industries. The first research work aims to enhance the operation of five-level hybrid ANPC inverter in the high-frequency switching region. A mathematical model is developed to select the most appropriate flying capacitors (FCs) for the five-level hybrid ANPC inverter, eliminating the need for complex pre-charging algorithms or external hardware. This model ensures the desired output voltage level (i.e., five-level pole voltage), further enhancing the performance of the inverters with reduced distortion on the output voltages. The second research work introduces a dual-reference voltage-based pulse width modulation (DRV-PWM) scheme for three-phase five-level hybrid ANPC inverters. This scheme, as an alternative switching scheme, provides the benefits of conventional phase- shifted-carrier-based PWM (PSC-PWM) by naturally balancing voltages without the need for voltage sensors. Additionally, it effectively balances thermal losses across the three phases, thereby improving the reliability and efficiency of the switching devices in the five- level hybrid ANPC inverter. The final research work proposes creative modulation schemes based on modified carrier-based PWM with an offset injection to extend the modulation index (MI) to a maximum of 115% (i.e., modified space vector PWM (SVPWM)). By applying these schemes, the lifetime of dc-link capacitors in three-level and five-level hybrid ANPC inverters is enhanced, resulting in improved reliability of the inverters thought the reduction of ripples in both the neutral-point current and common mode voltage (CMV). The research methodology involves a comprehensive analysis of the proposed works with detailed description of system modelling, conventional methods and related studies and addressing their limitations. In addition, the proposed methods are extensively explained to clarify the contribution in improving the overall performance and enhancing inverters reliability. Simulation studies and theoretical analyses are conducted to evaluate the performance and effectiveness of the proposed schemes. The outcomes demonstrate significant improvements in the reliability and efficiency of hybrid ANPC inverters. Overall, this research contributes to advancing the field of multilevel (three- and five- level) hybrid ANPC inverter technology by addressing crucial challenges and proposing innovative solutions to enhance their reliability especially the capacitors and switching devices. The developed modulation schemes and strategies offer valuable insights and practical applications for the design and implementation of reliable hybrid ANPC inverters in various power electronic systems.

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목차

CHAPTER 1. INTRODUCTION 1
1.1 BACKGROUND 1
1.2 LITERATURE REVIEW 2
1.2.1 MULTILEVEL INVERTERS: OVERVIEW AND SIGNIFICANCE 2
1.2.2 ANPC INVERTERS 7
1.2.3 PULSE-WIDTH MODULATION (PWM) CONTROL ALGORITHMS 8
1.2.4 IMPORTANCE OF HIGH SWITCHING FREQUENCY OPERATION AND SIC MOSFET SWITCHING DEVICES 10
1.2.5 RELIABILITY AND DC-LINK CAPACITORS 12
1.3 THESIS OBJECTIVES 13
1.3.1 IMPROVEMENTS ON THREE-LEVEL HYBRID ANPC INVERTER 13
1.3.2 IMPROVEMENTS ON FIVE-LEVEL HYBRID ANPC INVERTER 14
1.4 THESIS OUTLINE 15
CHAPTER 2. MODELLING OF MULTILEVEL HYBRID ANPC INVERTERS 17
2.1 INTRODUCTION 17
2.2 MODELLING AND OPERATIONAL PRINCIPLE OF THREE-LEVEL HYBRID ANPC INVERTER 17
2.3 MODELLING AND OPERATIONAL PRINCIPLE OF FIVE-LEVEL HYBRID ANPC INVERTER 24
2.4 HARDWARE SETUPS OF MULTILEVEL HYBRID ANPC INVERTERS 31
2.5 SUMMARY 36
CHAPTER 3. ENHANCED OPERATION OF FIVE-LEVEL HYBRID ANPC INVERTERS 37
3.1 RELATED STUDIES 37
3.2 INFLUENCE OF FC ON FIVE-LEVEL HYBRID ANPC INVERTER PERFORMANCE 38
3.3 SIMULATION VERIFICATION 42
3.4 EXPERIMENTAL VALIDATION 46
3.5 SUMMARY 51
CHAPTER 4. HIGH EFFICIENCY AND LOW COMPLEXITY MODULATION SCHEME FOR FIVE-LEVEL HYBRID ANPC INVERTERS 52
4.1 RELATED STUDIES 52
4.2 CONVENTIONAL PSC-PWM AND ITS LIMITATIONS 54
4.2.1 SWITCHING SCHEME 54
4.2.2 LIMITATIONS OF IMPLEMENTING PSC-PWM ON LOW-LEVEL DSPS 56
4.3 PROPOSED DRV-PWM 58
4.3.1 SWITCHING SCHEME 58
4.3.2 IMPLEMENTATION ON DSPS 59
4.4 EXPERIMENTAL VALIDATION 62
4.4.1 EXPERIMENTAL HARDWARE SETUP 62
4.4.2 EXECUTION TIME OF CONVENTIOAL AND PROPOSED METHODS 64
4.4.3 COMPARATIVE EXPERIMENTAL RESULTS OF CONVENTIONAL PSC-PWM AND PROPOSED DRV-PWM . 66
4.4.4 NUMERICAL COMPARATIVE THERMAL LOSS ANALYSIS OF CONVENTIONAL PSC-PWM AND PROPOSED DRV-PWM 70
4.5 SUMMARY 73
CHAPTER 5. LIFETIME EXTENSION OF DC-LINK CAPACITORS AND COMMON-MODE VOLTAGE RIPPLE REDUCTION IN MULTILEVEL HYBRID ANPC INVERTERS 75
5.1 RELATED STUDIES 75
5.2 REIABILITY ENHACEMENT OF THREE-LEVEL HYBRID ANPC INVERTER 77
5.2.1 ANALYSIS OF DC-LINK CURRENT AND COMMON-MODE VOLTAGE RIPPLES IN CONVENTIONAL SWITCHING SCHEMES 77
5.2.2 ANALYSIS OF DC-LINK CURRENT AND COMMON-MODE VOLTAGE RIPPLES IN PROPOSED SWITCHING SCHEME 81
5.2.3 DC-LINK CAPACITORS LIFETIME ESTIMATION 87
5.2.4 SIMULATION VERIFICATION 90
5.2.5 EXPERIMENTAL VALIDATION 95
5.3 REIABILITY ENHACEMENT OF FIVE-LEVEL HYBRID ANPC INVERTER 98
5.3.1 ANALYSIS OF DC-LINK CURRENT AND COMMON-MODE VOLTAGE RIPPLES IN CONVENTIONAL SWITCHING SCHEMES 98
5.3.2 ANALYSIS OF DC-LINK CURRENT AND COMMON-MODE VOLTAGE RIPPLES IN PROPOSED SWITCHING SCHEMES 102
5.3.3 SIMULATION VERIFICATION 107
5.3.4 EXPERIMENTAL VALIDATION 112
5.4 SUMMARY 116
CHAPTER 6. CONCLUSION 118
REFERENCE 120

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