RF 에너지 하베스팅을 위한 CMOS 정류기 회로의 설계
Design of CMOS Rectifier Circuit for RF Energy Harvesting
- 주제(키워드) Rectifier , reverse leakage current , thick-oxide MOSFET , adaptive configuration , power conversion efficiency (PCE)
- 발행기관 아주대학교
- 지도교수 권익진
- 발행년도 2019
- 학위수여년월 2019. 2
- 학위명 석사
- 학과 및 전공 일반대학원 전자공학과
- 실제URI http://www.dcollection.net/handler/ajou/000000028922
- 본문언어 영어
- 저작권 아주대학교 논문은 저작권에 의해 보호받습니다.
초록/요약
In this paper, a CMOS cross-coupled RF rectifier improved the reverse leakage current by using a thick-oxide MOSFET with a high threshold voltage as a rectifying device is proposed to improve the power conversion efficiency (PCE). As a result of reducing the reverse leakage current, peak PCE of up to 75.2 % is achieved at an RF input of -13 dBm. Furthermore, a rectifier that operates adaptively in two modes to improve PCE performance at low input is described. Through the operation in the serial mode and the parallel mode, the two peak PCE performance is achieved 61.6 % at a low input of -20 dBm and 65.8 % at a high input of -13 dBm. The proposed rectifier circuit is designed for 900 MHz UHF band applica-tion and implemented using 0.18 μm CMOS technology. This rectifier circuit has an input sensitivity of -16.5 dBm and achieves an input power range to achieve an optimal PCE of 9 dB.
more목차
Chapter 1. Introduction…………………………………………...………….. 1
Chapter 2. Conventional CMOS RF rectifier………………………………. 3
Chapter 3. Proposed rectifier with low reverse leakage……………………. 8
3.1. Circuit Design….……………………………………………………. 12
3.1.1. Determining load resistor RL…….…………….……………… 13
3.1.2. Optimizing the number of stages……………………..……….. 14
3.2. Post-layout simulation results ……………………………………….. 16
Chapter 4. Proposed rectifier with three adaptive configurations………… 20
4.1. Circuit design…………………………………………….…………... 21
4.1.1. Control circuit………………………………….……………… 23
4.1.2. Three adaptive configurations………………………..……….. 26
4.2 Post-layout simulation results ………………………………………... 29
Chapter 5. Proposed rectifier with two adaptive configurations…...……… 33
5.1. Circuit design…………………………………………….…………... 34
5.1.1. Revised control circuit……..………………….……………… 35
5.1.2. Two adaptive configurations…..……………………… 37
5.2 Pre-layout simulation results.…………………...……..………… 39
Chapter 6. Conclusion and future work…………………………………… 43
Publications…………………………………………………………………… 45
References…………………………………………………………………… 46
국문요약……………………………………………………………………… 49
